This invention relates to a semiconductor device and a method for manufacturing same in which the performance of the semiconductor device is improved. More particularly, this invention relates to measures for eliminating disadvantages caused by the effect of electrical shorts and shunts due to pin-holes or other gaps created during the fabrication process of the device.
Recently, considerable efforts have been made to develop systems for depositing amorphous semiconductor alloys, each of which can encompass relatively large areas, and which can be doped to form p-type and n-type materials for the production of p-i-n and other type devices which are, in photovoltaic and other applications, substantially equivalent to their crystalline counterparts. As such device, the applicant disclosed improved photoelectric cells in Japanease Patent Published Application Nos. sho 55-4994, 55-124274, 56-13777, 56-13778 and 56-13779.
One example of prior art photovoltaic device is shown in FIG. 1. In the figure, a transparent conductive film 2 is formed on a glass substrate 1 with a mask aligned above the substrate 1. Semiconductor layers 3 are deposited on the substrate 1 with the conductive film 2 therebetween with a mask aligned above the substrate 1. Further, on the substrate 1 with the conductive film 2 and the semiconductor layers 3, aluminium layer 4 are formed as second electrodes with a mask. Reference numerals 31 and 11 designate photoelectric cells respectively in the figure.
The two cells 31 and 11 are connected in series by means of a connection 12. In the connection 12 the second electrode 38 is made in contact with the first electrode 37. Upper electrode 39 is connected to external connection 5. Although the figure appears only with two connections, a number of the cells are connected with each other in series. The integrated photovoltaic device tends to be degraded after thermal treatment at 150.degree. C. for tens of hours. Such device is not suitable for outdoor use where the device is likely subjected to high temperature ambience. Further more it is impossible to perform the patterning of the aluminum layer 14 with laser processsing, instead of that with masks, since the laser beam is likely to injure the thin semiconductor film during processing. Efficiency of the patterning with masks can not be expected so much due to low accuracy in aligning the masks with the pattern, there being enjoyed no self alignment.
Further the voltage and current output of the thin film solar cells may be greatly reduced or completely eliminated by electrical short or shunts formed during the fabrication of the solar cell. Electrical shorts occur when there is a pinhole in the semiconductor layer and the front and back electrodes are touching. A shunt is the loss of charge in the semiconductor body due to imperfect barrier formation or the formation of an ohmic contact by high work function metal rather than a Schottky barrier formation. The problem of solar cell defects which cause shorts or shunts increase greatly with increasing solar cell size. If large area of solar cells are to be economically feasible, the methods of eliminating these shorts and shunts during fabrication or removing the defects after processing must be developed.